Re: [PATCH 0/2] arm64: dts: qcom: sm8350: Scale L3 and memory bandwidth with the CPUs

[Bjorn Andersson]

On Fri, 16 Oct 2026 06:01:14 +0000, Demeter Barna wrote:
> Add the EPSS L3 provider and CPU OPP tables that vote for LLCC, DDR and
> L3 bandwidth with the CPU frequency, as on SM8550 and SM8650.
> 
> Tested on a Razer Edge 5G, whose board support is not upstream yet:
> copy bandwidth on the A78 and X1 cores goes from 8 to 22-33 GB/s and
> DDR latency from 200 to 125 ns. Idle power with the screen off does not
> change; with the X1 busy on compute alone it rises by about 0.3 W.
> 
> [...]

Applied, thanks!

[1/2] arm64: dts: qcom: sm8350: Add the EPSS L3 provider
      commit: e8c26ee56a03d1d774f005e7179a541b4cf3c7e1
[2/2] arm64: dts: qcom: sm8350: Add CPU OPP tables with memory bandwidth
      commit: 3af17a599d46d1998f80c47378ca673329d29bb7

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>