[PATCH 1/2] gpio: davinci: use controller-specific MMIO for BINTEN
From: Sahaj Chaudhari
Date: Mon Nov 09 2026 - 14:51:23 EST
The file-global gpio_base can be overwritten when probes for multiple
DaVinci GPIO controllers overlap. The later IRQ setup can then write the
BINTEN register of a different controller.
Derive the BINTEN address from the current controller's mapped bank
instead of shared global state.
Fixes: 118150f22d6b ("gpio: davinci: move to platform device")
Signed-off-by: Sahaj Chaudhari <sahaj123.sc@xxxxxxxxx>
---
drivers/gpio/gpio-davinci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index f7c3b644e0e3..caeecfc3df20 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -43,7 +43,6 @@ typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
#define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
-static void __iomem *gpio_base;
static unsigned int offset_array[5] = {0x10, 0x38, 0x60, 0x88, 0xb0};
struct davinci_gpio_irq_data {
@@ -168,6 +167,7 @@ static int davinci_gpio_probe(struct platform_device *pdev)
unsigned int ngpio, nbank, nirq, gpio_unbanked;
struct davinci_gpio_controller *chips;
struct device *dev = &pdev->dev;
+ void __iomem *gpio_base;
/*
* The gpio banks conceptually expose a segmented bitmap,
@@ -588,7 +588,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
* BINTEN -- per-bank interrupt enable. genirq would also let these
* bits be set/cleared dynamically.
*/
- writel_relaxed(binten, gpio_base + BINTEN);
+ writel_relaxed(binten, chips->regs[0] - offset_array[0] + BINTEN);
return 0;
}
--
2.43.0