Re: [PATCH 4/4] mm/huge_memory: use the large-page PAT encoding for huge pfn mappings

From: Jose A. Perez de Azpillaga

Date: Wed Nov 11 2026 - 11:55:41 EST


On 11/11/26 3:06 PM, Eliav Farber wrote:
insert_pmd() and insert_pud() build the entry from the pgprot that
vmf_insert_pfn_pmd()/_pud() took from vma->vm_page_prot and passed
through pfnmap_setup_cachemode_pfn(). That pgprot carries the PTE-level
cache mode encoding, but x86 keeps the high PAT bit at bit 7 for a PTE
(_PAGE_BIT_PAT) and at bit 12 for a PMD or PUD (_PAGE_BIT_PAT_LARGE),
where bit 7 is _PAGE_PSE.

A memtype that needs that bit, write-through or write-protected, loses
it: the cache mode index of the huge entry drops from 4-7 to 0-3, so a
write-through range is mapped write-back. The other x86 paths that build

here contradicts the cover letter, shouldn't it say the same as the cover letter since its the one right?

a large entry from a PTE pgprot convert it first, see populate_pmd() and
populate_pud().

Convert in the two huge pfn paths. Add a generic pgprot_4k_2_large()
that returns its argument unchanged, so that only architectures which
encode the levels differently have to define it, and x86's existing
definition is picked up.

The folio paths keep using vma->vm_page_prot as is. They map
struct-page-backed memory, which x86 maps write-back.

Fixes: 6857be5fecae ("mm: introduce ARCH_SUPPORTS_HUGE_PFNMAP and special bits to pmd/pud")

I think that 5cad465d7fa6 ("mm: add vmf_insert_pfn_pmd()") would fit better, IMHO.

Signed-off-by: Eliav Farber <farbere@xxxxxxxxxx>
---
arch/x86/include/asm/pgtable_types.h | 2 ++
include/linux/pgtable.h | 9 +++++++++
mm/huge_memory.c | 4 ++--
3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index b1a669e775f4..b1ffd72e47ef 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -497,6 +497,8 @@ static inline pgprotval_t protval_4k_2_large(pgprotval_t val)
return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
}
+
+#define pgprot_4k_2_large pgprot_4k_2_large
static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
{
return __pgprot(protval_4k_2_large(pgprot_val(pgprot)));
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index 780fe849ff8b..112814d31f0c 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -1787,6 +1787,15 @@ void arch_sync_kernel_mappings(unsigned long start, unsigned long end);
#define pgprot_mhp(prot) (prot)
#endif
+/*
+ * Convert a pgprot built for a PTE so that it can be used in a PMD or PUD
+ * entry. Only needed on architectures that encode attributes differently
+ * between the levels; elsewhere the pgprot is used as is.
+ */
+#ifndef pgprot_4k_2_large
+#define pgprot_4k_2_large(prot) (prot)
+#endif
+
#ifdef CONFIG_MMU
#ifndef pgprot_modify
#define pgprot_modify pgprot_modify
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 052c50dadc48..945d480c1512 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1675,7 +1675,7 @@ static vm_fault_t insert_pmd(struct vm_area_struct *vma, unsigned long addr,
add_mm_counter(mm, mm_counter_file(fop.folio), HPAGE_PMD_NR);
}
} else {
- entry = pmd_mkhuge(pfn_pmd(fop.pfn, prot));
+ entry = pmd_mkhuge(pfn_pmd(fop.pfn, pgprot_4k_2_large(prot)));
entry = pmd_mkspecial(entry);
}
if (write) {
@@ -1804,7 +1804,7 @@ static vm_fault_t insert_pud(struct vm_area_struct *vma, unsigned long addr,
folio_add_file_rmap_pud(fop.folio, &fop.folio->page, vma);
add_mm_counter(mm, mm_counter_file(fop.folio), HPAGE_PUD_NR);
} else {
- entry = pud_mkhuge(pfn_pud(fop.pfn, prot));
+ entry = pud_mkhuge(pfn_pud(fop.pfn, pgprot_4k_2_large(prot)));
entry = pud_mkspecial(entry);
}
if (write) {

the code LGTM in general.

--
cheers,
jose a. p-a