On Tue, 11 Jan 2000, Ingo Oeser wrote:
> On Mon, 10 Jan 2000, Tigran Aivazian wrote:
> > The section 7.1.2.1 (of Intel PIII, Volume III) says that automatic
> > LOCK-ing is done:
> >
> > * When executing an XCHG instruction that references memory.
>
> ok, but what about the whole family. So i[345]86 and P II, too?
> Are any buggy mask revisions known, that break this assumption?
Not known to me. At least PII behaves in the same way (including the
cache coherency stuff).
Regards,
Tigran.
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