On Tue, 23 May 2000, Karel Kulhavy wrote:
> Hello
>
> What about using 8254 PIT for delaying? Is it possible to issue some
> read command between the writes into the 8259 PIC?
>
> Clock
>
Probably. However, this is a forwarning of things to come. It may work
with this chip-set, but not with the next one in which everything fits
inside a chip the size of a penny (and costs about the same).
There are several devices that have a built-in state-machine and once
this is started, it has to complete. For instance, setting the timers.
When you send a command that effectively states; "The next two writes are
the LSB and the MSB...". You just can't do anything that the chip
would "see", except the next two writes.
There have always been some "incomplete decodes" or "incomplete accesses"
to PC/AT devices. For instance, when programming the DMA controller, the
first thing you do is write to a register that resets the internal
pointers. You write anything. The data is not read, it's the write that
is detected by the chip.
We can prevent a lot of future problems by not trying to optimize one-time
startup code. AMD and Intel definitely look at Linux code.
Cheers,
Dick Johnson
Penguin : Linux version 2.3.41 on an i686 machine (800.63 BogoMips).
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