Den 18-Jul-00 09:30:09 skrev Ookhoi fĝlgende om "Re: APIC and edge triggered vs level triggered":
>Cool. :-) But what is (the difference between) edge triggered and level
>triggered? I searched on the Internet, but couldn't find it.. Please
>enlighten me :-)
I'm surpriced you couldn't find any information about the two types.
An edge triggered interrupt is trigged on the transition of the
interrupt line from high to low, from low to high or both. A level
triggered interrupt is triggered when the interrupt line is in either the
low state or in the high state.
There are two ways in which the differences between the two types affect that come to my mind
right now:
1) Level triggered interrupts may have to be cleared (from the interrupt
handler) on the device which generates them to restore the interrupt line
its normal state, something which is never necessary with edge triggered
interrupts.
2) Only level triggered interrupts can be shared. That's because only
the active state has to be actively driven by the devices, the passive
state can be handles by a passive pull-up or pull-down resistor.
Of course the type of interrupt might be converted several times between
the point where it is generated and the CPU.
Regards,
/ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻTŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ\
| Rask Ingemann Lambertsen | E-mail: mailto:rask@kampsax.k-net.dk |
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