[PATCH] HP Vectra XU 5/90 interrupt problems

From: John William (jw2357@hotmail.com)
Date: Wed Mar 14 2001 - 05:21:43 EST

I propose a patch of mpparse.c (patched against 2.4.2) to fix the Vectra XU
interrupt problem.

By the time we get to construct_default_ioirq_mptable(), we know we have an
ISA/PCI machine without any IRQ entries in the MP table. At this point the
kernel would just set up all the IRQ entries as ISA conforming entries (edge
sensitive). So any shared PCI interrupts won't work right.

A quick sanity check is made against the ELCR data (IRQ0, 1, 2 and 13 can
never be level sensitive). If the check passes, the ELCR data is copied into
the new MP table we are creating. This sets the PCI interrupts to level
sensitive.

This patch works on the Vectra XU 5/90 machines I have here.

Comments are welcome!

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This archive was generated by hypermail 2b29 : Thu Mar 15 2001 - 21:00:16 EST