On Wed, 2002-02-20 at 12:24, Rik van Riel wrote:
> One is a 64 bit extension to a modern superscalar
> architecture which has descended from 8 bit machines
> over the ages.
>
> The other is a 3-issue VLIW follow-up to the 2-issue
> VLIW i860.
One nitpick ;-)
The IA-64 architecture does not limit the number of parallel
instructions. I believe IPF (current Itanium) has a limit of 2 bundles
per instruction group, and with 3 instructions per bundle, that gives a
max of 6 parallel instructions. This can change in the future, though.
I learned this in (no, he isn't paying me!) David's IA-64 Kernel book.
Robert Love
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