>This may use less memory than 1) or 2) above on some architectures but
>will use more than 1) on cache-coherent architectures. It makes the
>code even more complex since now the code that allocates the dma
>buffer has to know which PCI device will use it (for example, in USB,
>the hub driver is separated from the HCD driver, which is who knows
>about the PCI bus).
What about an arch that can be both coherent or incoherent (the same
kernel binary would boot both) ?
I can also imagine quite a bunch of embedded stuffs where you may have
both coherent and non-coherent devices depending on the bus the live
on or on bridge bugs.
For your example, I don't buy it. You could well design the USB urb
allocation in such a way that they are passed down the controller of
a given device.
Ben.
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