On Wed, Jun 12, 2002 at 07:04:43AM +0200, Benjamin LaHaise wrote:
> Below are some updates to the pageattr patch you posted earlier. The
> first set of changes were to add change_page_attrs in several paths
> where the AGP and DRM code would allocate a page and then call
> ioremap_nocache on it to create an uncachable mapping. Secondly, I
I don't think these changes are needed. The GART tables itself have no physical
alias and the CPU AFAIK deals fine with virtual aliases.
> removed the #ifdef __i386__ around the change_page_attr hook, and
> instead put dummy macros in the headers for the various other archs.
> There was a race in pageattr.c that would make the P4 unhappy, so I
> moved the pte page free to after the tlb flush. The tlb flush was
I had already fixed that, but thanks.
> not flushing global pages, so I replaced the code with a call to
> flush_tlb_all() to do the job. Lastly, since the top page of the
> page tables on x86 is unique to each mm and contains copies of the
> pmd entries in non-PAE mode, I added a function to walk all mms via
> the mmlist to update the pmds before the tlb flush.
Urks. last version was only tested on PAE @)
Will release a new version tomorrow.
-Andi
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This archive was generated by hypermail 2b29 : Sat Jun 15 2002 - 22:00:26 EST