On Tue, Jul 23, 2002 at 08:15:48PM +0200, Maciej W. Rozycki wrote:
> On Tue, 23 Jul 2002, Andrea Arcangeli wrote:
>
> > diff -urNp race/include/asm-i386/system.h race-fix/include/asm-i386/system.h
> > --- race/include/asm-i386/system.h Tue Jul 23 18:46:44 2002
> > +++ race-fix/include/asm-i386/system.h Tue Jul 23 18:47:10 2002
> > @@ -143,6 +143,8 @@ struct __xchg_dummy { unsigned long a[10
> > #define __xg(x) ((struct __xchg_dummy *)(x))
> >
> >
> > +#ifdef CONFIG_X86_CMPXCHG
> > +#define __ARCH_HAS_GET_SET_64BIT 1
> > /*
> > * The semantics of XCHGCMP8B are a bit strange, this is why
> > * there is a loop and the loading of %%eax and %%edx has to
> > @@ -167,7 +169,7 @@ static inline void __set_64bit (unsigned
> > "lock cmpxchg8b (%0)\n\t"
> > "jnz 1b"
> > : /* no outputs */
> > - : "D"(ptr),
> > + : "r"(ptr),
> > "b"(low),
> > "c"(high)
> > : "ax","dx","memory");
>
> The condition is invalid, "cmpxchg" != "cmpxchg8b" and CONFIG_X86_CMPXCHG
> is (correctly) set for the i486 which doesn't support the latter. You
> probably need a separate option, e.g. CONFIG_X86_CMPXCHG8B, and verify the
> presence of the instruction with the feature flags if the option is set
> (check_config() seems the right place).
the problem with the feature flag check is that I don't want to make it
conditional at runtime, if I start adding branches and checks on the
feature flag (or pointer to functions) I can as well use the ordered
read/writes C version without reading/writing the 64bit atomically. So
the check_config() will be the oops or the not-oops at the first i_size
read/write :).
As for the CONFIG_X86_CMPXCHG8B you're right it's needed, setting
CONFIG_M486=y and CONFIG_SMP=y would generate a kernel that would oops
on a 486 and I don't see any other way to get 486+SMP case right without
checking for the X86_FEATURE_CX8 capability at runtime. Not that I think
486+SMP is high prio but yes, theoretically it's a bug.
Andrea
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This archive was generated by hypermail 2b29 : Tue Jul 23 2002 - 22:00:44 EST