On Thu, Oct 17, 2002 at 06:01:34PM +0100, Matthew Wilcox wrote:
>
> Both PA-RISC and IA64 benefit from these generic prefetching routines.
> Maybe other CPUs will too.
>
> + do {
> + prefetchw(p1+8);
> + prefetch(p2+8);
> + p1[0] ^= p2[0];
> + p1[1] ^= p2[1];
> + p1[2] ^= p2[2];
> + p1[3] ^= p2[3];
> + p1[4] ^= p2[4];
> + p1[5] ^= p2[5];
> + p1[6] ^= p2[6];
> + p1[7] ^= p2[7];
> + p1 += 8;
> + p2 += 8;
> + } while (--lines > 0);
Won't this prefetch past the end of the buffer ?
Some CPUs have problems with prefetching non-existant areas
of RAM iirc. (Which is why the memcpy routines do a prefetching
loop, and then a non prefetching loop to copy the tail).
Dave
-- | Dave Jones. http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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