On Sun, Nov 17, 2002 at 10:57:05PM -0800, William Lee Irwin III wrote:
> This oopses on NUMA-Q sometime prior to TSC synch and then hangs in TSC
> synch because not all cpus are responding where 2.5.47-mm3 (which
> included some intermediate bk stuff) did not. This is because AP's are
> taking timer interrupts before they are prepared to do so. Please apply
> the following patch from Martin Bligh which resolves this issue:
Actually, please apply this one instead. The prior patch did not
re-enable interrupts appropriately in its return paths (pointed out
by Andrew Morton):
diff -urpN linux-2.5.48/arch/i386/kernel/smpboot.c numaq-2.5.48/arch/i386/kernel/smpboot.c
--- linux-2.5.48/arch/i386/kernel/smpboot.c 2002-11-17 20:29:45.000000000 -0800
+++ numaq-2.5.48/arch/i386/kernel/smpboot.c 2002-11-17 22:35:05.000000000 -0800
@@ -419,6 +419,7 @@ void __init smp_callin(void)
smp_store_cpu_info(cpuid);
disable_APIC_timer();
+ local_irq_disable();
/*
* Allow the master to continue.
*/
@@ -1179,13 +1180,18 @@ void __init smp_prepare_cpus(unsigned in
int __devinit __cpu_up(unsigned int cpu)
{
/* This only works at boot for x86. See "rewrite" above. */
- if (test_bit(cpu, &smp_commenced_mask))
+ if (test_bit(cpu, &smp_commenced_mask)) {
+ local_irq_enable();
return -ENOSYS;
+ }
/* In case one didn't come up */
- if (!test_bit(cpu, &cpu_callin_map))
+ if (!test_bit(cpu, &cpu_callin_map)) {
+ local_irq_enable();
return -EIO;
+ }
+ local_irq_enable();
/* Unleash the CPU! */
set_bit(cpu, &smp_commenced_mask);
while (!test_bit(cpu, &cpu_online_map))
-
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This archive was generated by hypermail 2b29 : Sat Nov 23 2002 - 22:00:20 EST