>
>
>Hmm... that doesn't seem sufficient to explain it.
>
>Some background: I work with PPC embedded chips (the 4xx family) whose
>only way to get consistent memory is by entirely disabling the cache.
>
What do you mean with "disable"?
Do you have to disable the cache entirely when you encounter the first
pci_alloc_consistent() call, or do you disable the cache just for the
region that is returned by pci_alloc_consistent()?
If you disable it entirely - would "before_acess_consistent_area() /
after_access_consistent_area()" macros help to avoid that, or are there
other problems?
--
Manfred
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This archive was generated by hypermail 2b29 : Sat Dec 07 2002 - 22:00:23 EST