On Tue, 2003-01-14 at 18:49, Ross Biro wrote:
> Benjamin Herrenschmidt wrote:
>
> >Ok, but PIIX runs on intel platforms with real IOs, so there is no need
> >to perform a read... If we go the hwif->IOSYNC() way, we might well set
> >it up to no-op on x86 PIO iops by default and read of alt-status on
> >other archs if it's safe enough on other controllers/drives...
> >
> I believe that this will corrupt any inprogress UDMA transfer on the
> promise 20265 chip and probably others. It would be better to read the
> dma registers for the Promise controllers.
You mean on the chip's other channel ? As we discussed earlier, we don't
need to enforce this delay at all for DMA as we wait for the DMA
controller to complete in the interrupt anyway. Or did I miss a race ?
Ben.
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This archive was generated by hypermail 2b29 : Wed Jan 15 2003 - 22:00:51 EST