Jun wrote:
>cpu B:
> get the ipi and (WITHOUT CHECKING cpu_vm_mask again)
> go ahead doing tlb flushing.
>
>I am not sure if any disastrous result will happen, but apparently
>an unintended flush has happened.
>
Yes, that's possible. It should be rare (the windows is a few
instructions long), and on i386 it doesn't hurt.
>In MIPS such a hole could
>cause two processes using the same TLB entries which yields all kinds
>of interesting crashes.
>
What is your problem? Do your mips cpus have mmu contexts (the ability
to store tlb entries from multiple processes), and you load tlb entries
with the wrong context id?
The i386 implementation knows that i386 cpus don't support mmu contexts,
i.e. the whole tlb is flushed during process switches.
--
Manfred
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This archive was generated by hypermail 2b29 : Sat Feb 15 2003 - 22:00:19 EST