Re: [PATCH] Intel Alder IOAPIC fix

[James Bottomley]

OK, the bars in the previous mail are rubbish.  I put debugging into the
start up, so these are the correct bars:



PCI: Dev 0000:00:0f.0 Resource(0) fec01000-fec013ff (f=10001208, d=0,
p=0)
PCI: Cannot allocate resource region 0 of device 0000:00:0f.0
PCI: Dev 0000:00:0f.0 Resource(1) fffffc00-ffffffff (f=10001208, d=0,
p=0)
PCI: Cannot allocate resource region 1 of device 0000:00:0f.0
PCI: Dev 0000:00:0f.0 Resource(2) fffffc00-ffffffff (f=10001208, d=0,
p=0)
PCI: Cannot allocate resource region 2 of device 0000:00:0f.0
PCI: Dev 0000:00:0f.0 Resource(3) fffffc00-ffffffff (f=10001208, d=0,
p=0)
PCI: Cannot allocate resource region 3 of device 0000:00:0f.0
PCI: Dev 0000:00:0f.0 Resource(4) fffffc00-ffffffff (f=10001208, d=0,
p=0)
PCI: Cannot allocate resource region 4 of device 0000:00:0f.0
PCI: Dev 0000:00:0f.0 Resource(5) fffffc00-ffffffff (f=10001208, d=0,
p=0)
PCI: Cannot allocate resource region 5 of device 0000:00:0f.0

So BAR0 is actually the location of the second I/O APIC's mapped address
range (which we've already covered with a fixmap from the MP TABLE). 
I've no idea what the other four BARs all with addresses at 0xfffffc00
are doing.

The only way to prevent the current code (in arch/i386/pci/i386.c) from
reassigning this range seems to be to set the resource start to zero.

James




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