Re: PCI devices with no PCI_CACHE_LINE_SIZE implemented

[Jeff Garzik]

Matt Domsch wrote:
> Martin, below is a patch to lower the severity of this printk to
> KERN_DEBUG, as there are devices which (properly) don't implement the
> PCI_CACHE_LINE_SIZE register, and it's not a bug, so don't print at a
> WARNING level.
>
> Thanks,
> Matt

I'd send it straight to Marcelo, saying that the 2.6 PCI maintainer 
approved it....  Martin hasn't hacked on kernel code in a while...

	Jeff




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