Helge> Won't that put a bad load on the bus? Someone else mightI see. Still, this should only be used when we expect a
Helge> need it: * Another cpu in a smp system * Any device doing
Helge> bus-master transfers, even in a UP system
Actually with MSI, the PCI device writes directly to a host address.
In the proposed usage in this mail thread, the address is in host
memory, so there's no bus load to poll the memory. Presumably the
memory will be pulled into cache for the duration of the poll loop, so
there's not even any memory bandwidth consumed. (Of course this only
works on an architecture where PCI DMA is cache coherent)