Maybe. This would be a complicated thing.I bet it was! :)
Well. Not okay. Maybe this?Much simpler: IRET frame to return to user is
1. We build IRET frame on ring1 stack for step 4 (see below),
modify IRET frame on ring0 stack so that intrs are disabled
and CS:EIP and SS:ESP point to values of ring1 code/stack.
2. IRET returns to ring1 code with dedicated *16-bit* ring1 stackpopl %esp (as per Petr Vandrovec's suggestion)
Upper word of ESP is wrong now, but we can safely fiddle with it.
3. trampoline code fixes upper word of ESP (how?)
4. trampoline IRETs to user code.Works!
May work.
ring1 stacks must be per-CPU.I allocate it on a ring0 stack. Noone seem to
For what? We can have that fixed so why not?ESP<=0xffff check - I don't think this one isAny program which runs with 16bit stack and yet with
necessary).
ESP > 0xffff is doing something *terminally* weird.
I think it is acceptable to leave this case unfixed.
You cannot check 16bitness of SS descriptor in twoI do actually:
insns.