Re: weird APIC problem: irq 177 & irq 185

[Roland Dreier]

    Lee> There is no such thing as IRQ 177 and IRQ 185, correct?

With CONFIG_PCI_MSI (used to be CONFIG_PCI_USE_VECTOR) it's entirely
possible to get interrupt numbers like that.  On my dual Xeon system,
I have /proc/interrupts that looks like:

           CPU0       CPU1       CPU2       CPU3       
  0:  288964788          0          0          0    IO-APIC-edge  timer
  2:          0          0          0          0          XT-PIC  cascade
  4:        303          0          0          0    IO-APIC-edge  serial
 14:      67708          1          0          0    IO-APIC-edge  ide0
 15:         13          0          0          0    IO-APIC-edge  ide1
153:          0          0          0          0   IO-APIC-level  uhci_hcd
161:    1590294          0          0          0   IO-APIC-level  eth0
169:          0          0          0          0   IO-APIC-level  uhci_hcd
177:          0          0          0          0   IO-APIC-level  uhci_hcd
201:         81          0          0          0       PCI-MSI-X  ib_mthca (comp)
209:          2          0          0          0       PCI-MSI-X  ib_mthca (async)
217:       2171          0          0          0       PCI-MSI-X  ib_mthca (cmd)
NMI:   57794488   57794274   57794272   57794270 
LOC:  288981914  288981943  288981942  288981941 
ERR:          0
MIS:          0

 - Roland
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