Re: RCU question

[Zwane Mwaikambo]

On Sat, 11 Dec 2004, George Anzinger wrote:

> Manfred Spraul wrote:
> > >  
> > The trick is the sti instruction: It enables interrupt processing after the
> > following instruction.
> > 
> > Thus
> >    sti
> >    hlt
> > 
> > cannot race - it atomically enables interrupts and waits.
> 
> Exactly :)

Ok i wasn't aware that it was safe_halt() that he was referring too, my 
poor assumption. But regardless, this seems highly fragile and relying on 
behaviour which may change across processor models/vendors. I also found 
the following excerpt from (http://sandpile.org/ia32/inter.htm) which you 
may find interesting;

"Intel processors don't suppress SMI or NMI after an STI instruction. 
Since the INTR suppresion is not preserved across an SMI or NMI handler, 
this may result in an INTR being serviced after the STI, which constitutes 
a violation of the INTR suppresion. Therefore, ideally the STI instruction 
also suppresses SMI and NMI."

George thanks for persisting and explaining your point, i can be very slow 
=)

	Zwane
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