[PATCH] Sort out PCI_ROM_ADDRESS_ENABLE vs IORESOURCE_ROM_ENABLE

From: Jon Smirl
Date: Fri Jan 07 2005 - 16:26:58 EST

This sorts out the usage of PCI_ROM_ADDRESS_ENABLE vs
IORESOURCE_ROM_ENABLE. PCI_ROM_ADDRESS_ENABLE is for actually
manipulating the ROM's PCI config space. IORESOURCE_ROM_ENABLE is for
tracking the IORESOURCE that the ROM is enabled. Both are defined to 1
so code shouldn't change.

Just to remind people, there are new PCI routines for enable/disable
ROMs so please call them instead of directly coding access in device
drivers. There are ten or so drivers that need to be converted to the
new API.

Signed off by: Jon Smirl <jonsmirl@xxxxxxxxx>

--
Jon Smirl
jonsmirl@xxxxxxxxx
#Signed off by: Jon Smirl <jonsmirl@xxxxxxxxx>
===== arch/frv/mb93090-mb00/pci-frv.c 1.2 vs edited =====
--- 1.2/arch/frv/mb93090-mb00/pci-frv.c 2005-01-05 09:49:38 -05:00
+++ edited/arch/frv/mb93090-mb00/pci-frv.c 2005-01-07 15:54:45 -05:00
@@ -31,7 +31,7 @@
if (resource < 6) {
reg = PCI_BASE_ADDRESS_0 + 4*resource;
} else if (resource == PCI_ROM_RESOURCE) {
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
new |= PCI_ROM_ADDRESS_ENABLE;
reg = dev->rom_base_reg;
} else {
@@ -170,11 +170,11 @@
}
if (!pass) {
r = &dev->resource[PCI_ROM_RESOURCE];
- if (r->flags & PCI_ROM_ADDRESS_ENABLE) {
+ if (r->flags & IORESOURCE_ROM_ENABLE) {
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
u32 reg;
DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
- r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
+ r->flags &= ~IORESOURCE_ROM_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, &reg);
pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
}
===== arch/i386/pci/i386.c 1.22 vs edited =====
--- 1.22/arch/i386/pci/i386.c 2004-10-20 04:37:05 -04:00
+++ edited/arch/i386/pci/i386.c 2005-01-07 15:54:42 -05:00
@@ -150,11 +150,11 @@
}
if (!pass) {
r = &dev->resource[PCI_ROM_RESOURCE];
- if (r->flags & PCI_ROM_ADDRESS_ENABLE) {
+ if (r->flags & IORESOURCE_ROM_ENABLE) {
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
u32 reg;
DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
- r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
+ r->flags &= ~IORESOURCE_ROM_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, &reg);
pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
}
===== arch/mips/pmc-sierra/yosemite/ht.c 1.3 vs edited =====
--- 1.3/arch/mips/pmc-sierra/yosemite/ht.c 2004-08-04 07:59:12 -04:00
+++ edited/arch/mips/pmc-sierra/yosemite/ht.c 2005-01-07 15:54:39 -05:00
@@ -361,7 +361,7 @@
if (resource < 6) {
reg = PCI_BASE_ADDRESS_0 + 4 * resource;
} else if (resource == PCI_ROM_RESOURCE) {
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
reg = dev->rom_base_reg;
} else {
/*
===== arch/ppc/kernel/pci.c 1.48 vs edited =====
--- 1.48/arch/ppc/kernel/pci.c 2004-10-20 04:37:05 -04:00
+++ edited/arch/ppc/kernel/pci.c 2005-01-07 15:56:33 -05:00
@@ -521,11 +521,11 @@
if (pass)
continue;
r = &dev->resource[PCI_ROM_RESOURCE];
- if (r->flags & PCI_ROM_ADDRESS_ENABLE) {
+ if (r->flags & IORESOURCE_ROM_ENABLE) {
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
u32 reg;
DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
- r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
+ r->flags &= ~IORESOURCE_ROM_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, &reg);
pci_write_config_dword(dev, dev->rom_base_reg,
reg & ~PCI_ROM_ADDRESS_ENABLE);
===== arch/sh/drivers/pci/pci.c 1.5 vs edited =====
--- 1.5/arch/sh/drivers/pci/pci.c 2004-10-19 01:26:43 -04:00
+++ edited/arch/sh/drivers/pci/pci.c 2005-01-07 15:59:01 -05:00
@@ -57,7 +57,7 @@
if (resource < 6) {
reg = PCI_BASE_ADDRESS_0 + 4*resource;
} else if (resource == PCI_ROM_RESOURCE) {
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
new |= PCI_ROM_ADDRESS_ENABLE;
reg = dev->rom_base_reg;
} else {
===== arch/sh64/kernel/pcibios.c 1.1 vs edited =====
--- 1.1/arch/sh64/kernel/pcibios.c 2004-06-29 10:44:46 -04:00
+++ edited/arch/sh64/kernel/pcibios.c 2005-01-07 15:54:25 -05:00
@@ -45,7 +45,7 @@
if (resource < 6) {
reg = PCI_BASE_ADDRESS_0 + 4*resource;
} else if (resource == PCI_ROM_RESOURCE) {
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
new |= PCI_ROM_ADDRESS_ENABLE;
reg = dev->rom_base_reg;
} else {
===== arch/sparc64/kernel/pci_psycho.c 1.30 vs edited =====
--- 1.30/arch/sparc64/kernel/pci_psycho.c 2004-09-28 23:20:35 -04:00
+++ edited/arch/sparc64/kernel/pci_psycho.c 2005-01-07 16:01:09 -05:00
@@ -1133,7 +1133,7 @@
(((u32)(res->start - root->start)) & ~size));
if (resource == PCI_ROM_RESOURCE) {
reg |= PCI_ROM_ADDRESS_ENABLE;
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
}
pci_write_config_dword(pdev, where, reg);

===== arch/sparc64/kernel/pci_sabre.c 1.33 vs edited =====
--- 1.33/arch/sparc64/kernel/pci_sabre.c 2004-09-01 20:54:18 -04:00
+++ edited/arch/sparc64/kernel/pci_sabre.c 2005-01-07 16:01:09 -05:00
@@ -1100,7 +1100,7 @@
(((u32)(res->start - base)) & ~size));
if (resource == PCI_ROM_RESOURCE) {
reg |= PCI_ROM_ADDRESS_ENABLE;
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
}
pci_write_config_dword(pdev, where, reg);

===== arch/sparc64/kernel/pci_schizo.c 1.37 vs edited =====
--- 1.37/arch/sparc64/kernel/pci_schizo.c 2004-09-28 23:20:35 -04:00
+++ edited/arch/sparc64/kernel/pci_schizo.c 2005-01-07 15:54:12 -05:00
@@ -1554,7 +1554,7 @@
(((u32)(res->start - root->start)) & ~size));
if (resource == PCI_ROM_RESOURCE) {
reg |= PCI_ROM_ADDRESS_ENABLE;
- res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ res->flags |= IORESOURCE_ROM_ENABLE;
}
pci_write_config_dword(pdev, where, reg);

===== drivers/mtd/maps/pci.c 1.8 vs edited =====
--- 1.8/drivers/mtd/maps/pci.c 2004-11-28 14:18:10 -05:00
+++ edited/drivers/mtd/maps/pci.c 2005-01-07 16:03:08 -05:00
@@ -205,9 +205,9 @@
* or simply enabling it?
*/
if (!(pci_resource_flags(dev, PCI_ROM_RESOURCE) &
- PCI_ROM_ADDRESS_ENABLE)) {
+ IORESOURCE_ROM_ENABLE)) {
u32 val;
- pci_resource_flags(dev, PCI_ROM_RESOURCE) |= PCI_ROM_ADDRESS_ENABLE;
+ pci_resource_flags(dev, PCI_ROM_RESOURCE) |= IORESOURCE_ROM_ENABLE;
pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val);
val |= PCI_ROM_ADDRESS_ENABLE;
pci_write_config_dword(dev, PCI_ROM_ADDRESS, val);
@@ -241,7 +241,7 @@
/*
* We need to undo the PCI BAR2/PCI ROM BAR address alteration.
*/
- pci_resource_flags(dev, PCI_ROM_RESOURCE) &= ~PCI_ROM_ADDRESS_ENABLE;
+ pci_resource_flags(dev, PCI_ROM_RESOURCE) &= ~IORESOURCE_ROM_ENABLE;
pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val);
val &= ~PCI_ROM_ADDRESS_ENABLE;
pci_write_config_dword(dev, PCI_ROM_ADDRESS, val);