Added EHCI maintainer to this one as well. If possible, this looks like a good candidate for a /proc or /sys knob?
No, it's based on a mis-understanding of the hardware.
The controller should only be doing DMA when some driver has submitted
an URB and that URB hasn't yet completed. Pretty much like any other
hardware, like a disk or network controller.
For periodic transfers -- interrupt, isochronous, neither used for
disk I/O -- the driver issuing the transfer always has control over
the polling period. But that's mostly related to the USB activity;
if a periodic transfer is active, then the current segment of the
periodic schedule has to be scanned (by DMA) every microframe (8x/msec).
If that segment is empty, that's just one word (32 bits). If there
are transfers, it's got to read them and maybe perform them.