Re: What breaks aic7xxx in post 2.6.12-rc2 ?

[James Bottomley]

On Tue, 2005-06-07 at 10:57 +0200, Grégoire Favre wrote:
> I have set all device to 10 Mhz (for that controller) in the BIOS, but I
> still can't boot.

OK, let's see if I can find out why this particular controller isn't
transferring the bios settings to the transport class max and min

Try this patch and send me the output.

Thanks,

James

--- a/drivers/scsi/aic7xxx/aic7xxx_osm.c
+++ b/drivers/scsi/aic7xxx/aic7xxx_osm.c
@@ -620,9 +620,11 @@ ahc_linux_target_alloc(struct scsi_targe
 	*ahc_targp = starget;
 	memset(targ, 0, sizeof(*targ));
 
+	dev_printk(KERN_ERR, &starget->dev, "SC IS %p\n", sc);
 	if (sc) {
 		if ((ahc->features & AHC_ULTRA2) != 0) {
 			scsirate = sc->device_flags[target_offset] & CFXFER;
+			dev_printk(KERN_ERR, &starget->dev, "ULTRA2\n");
 		} else {
 			scsirate = (sc->device_flags[target_offset] & CFXFER) << 4;
 			if (sc->device_flags[target_offset] & CFSYNCH)
@@ -635,6 +637,12 @@ ahc_linux_target_alloc(struct scsi_targe
 			spi_max_width(starget) = 0;
 		spi_min_period(starget) = 
 			ahc_find_period(ahc, scsirate, AHC_SYNCRATE_DT);
+		dev_printk(KERN_ERR, &starget->dev, "scsirate IS 0x%x, min_period is %d\n", scsirate, spi_min_period(starget));
+		if (spi_min_period(starget) == 0)
+			/* This means async, so set offset to zero */
+			spi_max_offset(starget) = 0;
+		
+
 		tinfo = ahc_fetch_transinfo(ahc, channel, ahc->our_id,
 					    starget->id, &tstate);
 	}


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