Re: [PATCH] i386: Selectable Frequency of the Timer Interrupt

[Vojtech Pavlik]

On Sat, Jul 23, 2005 at 04:40:46PM -0700, randy_dunlap wrote:
> On Sat, 16 Jul 2005 23:55:17 -0400 Lee Revell wrote:
> 
> > On Sat, 2005-07-16 at 19:35 -0700, Nish Aravamudan wrote: 
> > > As you've seen, I think it depends on the timesource: for the PIT, it
> > > would be arch/i386/kernel/timers/timer_pit.c::setup_pit_timer().
> > 
> > That one looks pretty straightforward.
> > arch/i386/kernel/timers/timer_tsc.c really looks like fun.  So many
> > corner cases...
> > 
> > BTW shouldn't this code from mark_offset_tsc():
> > 
> > 402         if (pit_latch_buggy) {
> > 403                 /* get center value of last 3 time lutch */
> > 404                 if ((count2 >= count && count >= count1)
> > 405                     || (count1 >= count && count >= count2)) {
> > 406                         count2 = count1; count1 = count;
> > 407                 } else if ((count1 >= count2 && count2 >= count)
> > 408                            || (count >= count2 && count2 >= count1)) {
> > 409                         countmp = count;count = count2;
> > 410                         count2 = count1;count1 = countmp;
> > 411                 } else {
> > 412                         count2 = count1; count1 = count; count = count1;
> > 413                 }
> > 414         }
> > 
> > use an ifdef?  It only applies to cyrix_55x0, and mark_offset_tsc is a
> > pretty hot path.
> 
> I see your point, but several distros build kernels that run on
> almost any x86-32 machine, so I think that it's there as is
> for universal-kernel support.
 
The same latch bug is in stone age Intel Pentium chipsets and some
medieval SiS chipsets. VIA chipsets from the middle age have another
interesting bug in the PIT.

-- 
Vojtech Pavlik
SuSE Labs, SuSE CR
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