Re: [PATCH 2.6.13] lockless pagecache 2/7

[Alan Cox]

On Sul, 2005-09-04 at 11:01 +1000, Nick Piggin wrote:
> I would be surprised if it was a big loss... but I'm assuming
> a locked cmpxchg isn't outlandishly expensive. Basically:
> 
>    read_lock_irqsave(cacheline1);
>    atomic_inc_return(cacheline2);
>    read_unlock_irqrestore(cacheline1);
> 
> Turns into
> 
>    atomic_cmpxchg();
> 
> I'll do some microbenchmarks and get back to you. I'm quite
> interested now ;) What sort of AMDs did you have in mind,


Athlon or higher give very different atomic numbers to P4. If you are
losing the read_lock/unlock then the atomic_cmpxchg should be faster on
all I agree.

One question however - atomic_foo operations are not store barriers so
you might need mb() and friends for PPC ?

Alan

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