Re: PAT status?

[Dave Jones]

On Thu, Dec 08, 2005 at 03:37:43PM +0000, Daniel J Blueman wrote:
 > Terence Ripperda wrote:
 > > Hi Jeff,
 > >
 > > I unfortunately haven't had much time to look at the status of the PAT
 > > code I had been working on. there are really 2 steps to the code:
 > >
 > > the first is enabling and configuring the PAT registers. this then
 > > allows a page table entry define that can be passed to traditional
 > > interfaces, such as remap_page_range or change_page_attr. this is
 > > pretty simple and we've been using a similar interface in our driver
 > > for some time now.
 > 
 > Presumably, the aliasing will only bite where eg the X server sets up
 > MTRRs and PAT is used for the region also. For x86_64 and IA32, the
 > Intel IA32 system guides tell us that strong store ordering (ie
 > write-through) takes precendence over weaker store ordering (eg
 > write-combining), so we should be safe. For processors with known
 > errata with PAT etc, we can disable PAT support.
 > 
 > Would it be useful to get a rough patch covering point #1 onto LKML
 > for discussion?

http://lwn.net/Articles/135883/ is Terrence's last patch
rediffed against 2.6.12 patch.

		Dave

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