386/smp issue with atomic_add_return()

[lepton]

Hi
	Is there any smp box with 386 cpu?
	If it exist, then I think atomic_add_return has a problem.
	Just disabling local interrupts can not keep another cpu from entering this function.
	What do you think about this?

	This is the code (copied from 2.6.16.4):

	#ifdef CONFIG_M386
 no_xadd: /* Legacy 386 processor */
        local_irq_disable();
        __i = atomic_read(v);
        atomic_set(v, i + __i);
        local_irq_enable();
        return i + __i;
	#endif
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