Re: [PATCH 2/2] I386 convert pae wmb to non smp
From: Keir Fraser
Date: Thu Apr 27 2006 - 04:22:34 EST
On 27 Apr 2006, at 04:30, Nick Piggin wrote:
The name is pretty confused. smp_wmb seems to imply an SMP-only
barrier, whereas we want here a write barrier on regular memory.
That is just a compiler barrier (barrier()). A CPU should always be
consistent with
itself so memory ordering doesn't really apply there (hence smp_
prefix, which also
are compiler barriers, of course).
This would be an issue of consistency between a CPU and its TLB, so I
doubt the usual self-consistency argument would hold. I would consider
the TLB as logically external and separate from the core execution
logic of the CPU. Of course it's an academic point either way since no
PAE-capable x86 processor ever reorders stores to WB memory -- my
original point was simply that smp_wmb() is a misleading name in this
context, even barrier() would be clearer imo, but I'm in no way a Linux
abstract memory model expert.
-- Keir
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