Re: [PATCH] PIIX: fix 82371MX enablebits

[Alan Cox]

On Iau, 2006-05-11 at 23:50 +0400, Sergei Shtylyov wrote:
>      According to the datasheet, Intel 82371MX (MPIIX) actually has only a
> single IDE channel mapped to the primary or secondary ports depending on the
> value of the bit 14 of the IDETIM register at PCI config. offset 0x6C (the
> register at 0x6F which the driver refers to. doesn't exist). So, disguise the
> controller as dual channel and set enablebits masks/values such that only
> either primary or secondary channel is detected enabled. Also, preclude the
> IDE probing code from reading PCI BARs, this controller just doesn't have them
> (it's not the separate PCI function like the other PCI controllers), it only
> decodes the legacy addresses.

There are lots and lots of other things you need to fix to make MPIIX
work with that driver. It has only a single timing register for one so
you must switch timing as you flip drive. Also it is not an IDE class
device so the PCI native/legacy and simplex stuff is not valid. Finally
the PIIX driver pokes several registers it doesn't even have.

What else - oh yes the piix driver doesn't even tune the timings, so it
doesn't work anyway.


Thats why drivers/scsi/pata_mpiix is a separate driver. Really if you
want to try and rescue the old PIIX driver you should split out PIIX3
and MPIIX into their own drivers.


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