Re: [PATCH] hptiop: HighPoint RocketRAID 3xxx controller driver

[HighPoint Linux Team]

Could you give more explanation about pci posting flush? When (and why) do we need it?
In an old posting (http://lkml.org/lkml/2003/5/8/278) said pci posting flush is unnecessary - is it correct?

Thanks.

>
>> + }
>> +
>> + if (req != IOPMU_QUEUE_EMPTY) {
> +  writel(req, &iop->outbound_queue);
>
>does this need a PCI posting flush?
>
>> +
>> +static int iop_send_sync_msg(struct hptiop_hba * hba, u32 msg, u32 
>> +millisec) {
>> + u32 i;
>> +
>> + hba->msg_done = 0;
>> +
>> + writel(msg, &hba->iop->inbound_msgaddr0);
>> +
>> + for (i = 0; i < millisec; i++) {
>> +  __iop_intr(hba);
>> +  if (hba->msg_done)
>> +   break;
>> +  mdelay(1);
>> + }
>>
>>and here, but here you're very clearly missing a pci posting flush
>>
>> + else
>> +  arg->result = HPT_IOCTL_RESULT_FAILED;
>> +
>> + arg->done(arg);
>> + writel(tag, &hba->iop->outbound_queue); }
>
>this looks like it needs a posting flush again
>
>> + memcpy(req->cdb, scp->cmnd, sizeof(req->cdb));
>> +
>> + writel(IOPMU_QUEUE_ADDR_HOST_BIT | _req->req_shifted_phy,
>> +   &hba->iop->inbound_queue);
>
>this needs pci posting flush
>
>> +
>> +static int hptiop_reset_hba(struct hptiop_hba * hba) {  if 
>> +(atomic_xchg(&hba->resetting, 1) == 0) {
>> +  atomic_inc(&hba->reset_count);
>> +  writel(IOPMU_INBOUND_MSG0_RESET,
>> +    &hba->iop->outbound_msgaddr0);
>> + }
>
>this needs a pci posting flush


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