Re: 2.6.15-rc1: IDE: fix potential data corruption with SL82C105interfaces
From: Sergei Shtylyov
Date: Mon May 15 2006 - 12:06:38 EST
Hello.
Alan Cox wrote:
On Llu, 2006-05-15 at 18:32 +0400, Sergei Shtylyov wrote:
Heh, this driver also tries to cache the single PCI register per-channel
like hpt366.c... This buglet concerns using fast PIO timings and is probably
harmless though but needs to be fixed -- I'll send a patch soon...
I wonder what is otherwise wrong with using 2 channels concurrently?
I've not got any dual channel devices to test, and in fact I couldn't
find anyone with dual channel stuff at all.
Hm, I thought they're all dual channel, at least from W83C553F docs. We
have this chip on several embedded boards -- I'll try to gain access to one of
them when I get to this driver...
The caching is one bug, the
fact the reset hits both channels is the other I know about.
Ah, that register 0x7E reset? Strangely, W83C55[34]F datasheets don't even
mention it. :-/
Otherwise the libata driver is fairly similar
Found it, looking...
although the timing is
pre-computed from the documentation for the DMA modes.
As these chips lack 66 MHz PCI support, this should be quite enough, I
think... :-)
MBR, Sergei
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