Re: REGRESSION: the new i386 timer code fails to sync CPUs

[Matthias Urlichs]

Hi,

Azndrew Morton:
> What is 2.6.17-test-1.29?

My test build; standard kernel during bisection.

> How do you know that 5d0cf410e94b1f1ff852c3f210d22cc6c5a27ffa caused this?
> 
git bisect.

> Are you able to test the below?  It should fix up the reporting.
> 
Applied.

> Are you able to compare the present bootlog with the 2.6.17 bootlog?
> 
Sure. The diff says:

 checking TSC synchronization across 4 CPUs:
+CPU#0 had 748437 usecs TSC skew, fixed it up.
+CPU#1 had 748437 usecs TSC skew, fixed it up.
+CPU#2 had -748437 usecs TSC skew, fixed it up.
+CPU#3 had -748437 usecs TSC skew, fixed it up.
 Brought up 4 CPUs
-migration_cost=4000,8000
+migration_cost=85,1724

... but apparently, that skew is not corrected.

These numbers do match the difference in observed "date" outputs.

-- 
Matthias Urlichs   |   {M:U} IT Design @ m-u-it.de   |  smurf@xxxxxxxxxxxxxx
Disclaimer: The quote was selected randomly. Really. | http://smurf.noris.de
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