Re: REGRESSION: the new i386 timer code fails to sync CPUs

[Matthias Urlichs]

Hi,

Andrew Morton:
> - CPU0 and CPU1 share a TSC and CPU2 and CPU3 share another TSC.
> 
That mmakes sense, since they're one dual-core Xeon each.

> - Earlier kernels didn't use the TSC as a time source whereas this one
>   does, hence the problems which you're observing.
> 
Correct; see below.

> I assume that booting with clock=pit or clock=pmtmr fixes it?
> 
Testing... yes, both.

> It would be useful to check your 2.6.17 boot logs, see if we can work out
> what 2.6.17 was using for a clock source.
> 
That's easy:

2.6.17    -Using pmtmr for high-res timesource
2.6.18git +Time: tsc clocksource has been installed.

I missed those two lines, as in the boot logs they're not really
adjacent, so they got lost in the jumble of other differences.

Interestingly, CPU0/1 gets 6000 bogomips while CPU2/3 only reaches 5600 ..?
(That happens with both kernels.) I do wonder why, and whether this has any
bearing on the current problem.

-- 
Matthias Urlichs   |   {M:U} IT Design @ m-u-it.de   |  smurf@xxxxxxxxxxxxxx
Disclaimer: The quote was selected randomly. Really. | http://smurf.noris.de
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