Re: [discuss] Re: [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC

[Andi Kleen]

On Wednesday 02 August 2006 00:06, Sergio Monteiro Basto wrote:
> On Tue, 2006-08-01 at 23:56 +0200, Andi Kleen wrote:
> > Lost timer ticks print a rip. Do you have some samples?

Can you send dmesg with the following patch applied too?

cc'ing Suresh because he might have an explanation too then.

-Andi

Index: linux-2.6.18-rc3-work/arch/x86_64/kernel/smpboot.c
===================================================================
--- linux-2.6.18-rc3-work.orig/arch/x86_64/kernel/smpboot.c
+++ linux-2.6.18-rc3-work/arch/x86_64/kernel/smpboot.c
@@ -345,7 +345,7 @@ static void __cpuinit tsc_sync_wait(void
 	 * mess up a possible perfect synchronization with a
 	 * not-quite-perfect algorithm.
 	 */
-	if (notscsync || !cpu_has_tsc || !unsynchronized_tsc())
+	if (0 && (notscsync || !cpu_has_tsc || !unsynchronized_tsc()))
 		return;
 	sync_tsc(0);
 }
-
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