[PATCH 3/4] IP100A: Correct initial and close hardware step.2006-08-24

[Jesse Huang]

From: Jesse Huang <jesse@xxxxxxxxxxxxx>

Change Logs:
   - Correct initial and close hardware step.

Signed-off-by: Jesse Huang <jesse@xxxxxxxxxxxxx>

---

 drivers/net/sundance.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

419599b10f1253ccd7224bbd369924307e1e5bb6
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index dd41ee2..04ad4d8 100755
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -787,6 +787,7 @@ static int netdev_open(struct net_device
 {
 	struct netdev_private *np = netdev_priv(dev);
 	void __iomem *ioaddr = np->base;
+	unsigned long flags;
 	int i;
 
 	/* Do we need to reset the chip??? */
@@ -831,6 +832,10 @@ #endif
 		iowrite8(0x01, ioaddr + DebugCtrl1);
 	netif_start_queue(dev);
 
+	spin_lock_irqsave(&np->lock, flags);
+	reset_tx(dev);
+	spin_unlock_irqrestore(&np->lock, flags);
+
 	iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
 
 	if (netif_msg_ifup(np))
@@ -1656,6 +1661,9 @@ static int netdev_close(struct net_devic
 	/* Disable interrupts by clearing the interrupt mask. */
 	iowrite16(0x0000, ioaddr + IntrEnable);
 
+	/* Disable Rx and Tx DMA for safely release resource */
+	iowrite32(0x500, ioaddr + DMACtrl);
+
 	/* Stop the chip's Tx and Rx processes. */
 	iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);
 
-- 
1.3.GIT



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