Re: [PATCH 1/3] Fix COW D-cache aliasing on fork

[Linus Torvalds]

On Fri, 20 Oct 2006, David Miller wrote:
> 
> You get an asynchronous fault from the L2 cache, and that's also what
> happens when the TLB entry is missing during L2 writeback too.  You
> get a level 15 non-maskable IRQ when these asynchronous errors happen.

Well, sparc always was crud. I can see the missing tlb entry, but if it's 
been turned read-only, the write-back should still work (it clearly _was_ 
writable when the write that dirtied the cacheline happened).

Anyway, if you cannot flush a read-only mapping, then the "flush at COW 
fault time" won't work _either_, since the original mapping is still 
read-only.

So regardless, the COW-time flush cannot work. But the "flush before the 
TLB flush, and then flush after in case we had a race" approach should 
work as well as it can in practice, no?

			Linus
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