[PATCH] i386 mce check capability

[Joachim Deguara]

Currently the i386 architecture checks the family for mce capability and this removes that and uses the CPUID information.  Tested on a K8 revE and a family10h processor.

-Joachim
This eliminates checking of a set AMD procesor family if mce is 
allowed and relies on the information being in CPUID.

Signed-off-by: Joachim Deguara <joachim.deguara@xxxxxxx>

Index: 2.6-linus-git/arch/i386/kernel/cpu/mcheck/mce.c
===================================================================
--- 2.6-linus-git.orig/arch/i386/kernel/cpu/mcheck/mce.c
+++ 2.6-linus-git/arch/i386/kernel/cpu/mcheck/mce.c
@@ -38,8 +38,7 @@ void mcheck_init(struct cpuinfo_x86 *c)
 
 	switch (c->x86_vendor) {
 		case X86_VENDOR_AMD:
-			if (c->x86==6 || c->x86==15)
-				amd_mcheck_init(c);
+			amd_mcheck_init(c);
 			break;
 
 		case X86_VENDOR_INTEL:
Index: 2.6-linus-git/arch/i386/kernel/cpu/mcheck/k7.c
===================================================================
--- 2.6-linus-git.orig/arch/i386/kernel/cpu/mcheck/k7.c
+++ 2.6-linus-git/arch/i386/kernel/cpu/mcheck/k7.c
@@ -75,6 +75,9 @@ void amd_mcheck_init(struct cpuinfo_x86 
 	machine_check_vector = k7_machine_check;
 	wmb();
 
+	if (!cpu_has(c, X86_FEATURE_MCE))
+		return;
+
 	printk (KERN_INFO "Intel machine check architecture supported.\n");
 	rdmsr (MSR_IA32_MCG_CAP, l, h);
 	if (l & (1<<8))	/* Control register present ? */