Re: [PATCH] make atomic_t volatile on all architectures

[Chris Snook]

Lennert Buytenhek wrote:
> On Wed, Aug 08, 2007 at 07:07:33PM -0400, Chris Snook wrote:
>
> > From: Chris Snook <csnook@xxxxxxxxxx>
> >
> > Some architectures currently do not declare the contents of an atomic_t to be
> > volatile.  This causes confusion since atomic_read() might not actually read
> > anything if an optimizing compiler re-uses a value stored in a register, which
> > can break code that loops until something external changes the value of an
> > atomic_t.  Avoiding such bugs requires using barrier(), which causes re-loads
> > of all registers used in the loop, thus hurting performance instead of helping
> > it, particularly on architectures where it's unnecessary.  Since we generally
> > want to re-read the contents of an atomic variable on every access anyway,
> > let's standardize the behavior across all architectures and avoid the
> > performance and correctness problems of requiring the use of barrier() in
> > loops that expect atomic_t variables to change externally.  This is relevant
> > even on non-smp architectures, since drivers may use atomic operations in
> > interrupt handlers.
> >
> > Signed-off-by: Chris Snook <csnook@xxxxxxxxxx>
>
> Documentation/atomic_ops.txt would need updating:
>
> 	[...]
>
> 	One very important aspect of these two routines is that they DO NOT
> 	require any explicit memory barriers.  They need only perform the
> 	atomic_t counter update in an SMP safe manner.

Thanks, I was looking for that.  I'll re-send shortly with my comment 
moved there.  People are already using atomic_t in a manner that implies 
the use of memory barriers and interrupt-safety, which is what the patch 
enforces.

	-- Chris
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