Re: [PATCH] x86_64: make amd quad core 8 socket system not be clustered_box v2

[Ravikiran Thirumalai]

On Mon, Feb 25, 2008 at 09:27:42PM -0800, Yinghai Lu wrote:
>On Mon, Feb 25, 2008 at 8:05 PM, Ravikiran Thirumalai <kiran@xxxxxxxxxxx> wrote:
>> On Tue, Feb 26, 2008 at 04:46:25AM +0100, Andi Kleen wrote:
>>
>>  >
>>  >If you can't support that in your hardware you're supposed
>>  >to clear it.
>>
>>  Hmm! How would a hardware vendor do that? That doesn't seem to be clear in
>>  the BKDG. (Well, this is the problem with undocumented features :()
>>
>any good sign for APIC_clustered box? there is apicid between cpus
>even all cpu are quadcore and fully populated?

I would suggest checking the SLIT distances -- On AMD boxes, if you have three
different distances between nodes, then that system would be multiboard,
and there is no way TSCs can be synced.  On Intel boxes, if there are two
different distances between nodes, then this would be a multi board/multi
chassi box and TSCs won't be synced.  This is a more generic solution and
should work on Summit/Unisys boxes as well.  (I am ignoring Intel CSI for
now.  It might need the same treatment as AMD)

Comments?

Kiran
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