Re: 2.6.25-rc3: "__divdi3" [drivers/crypto/hifn_795x.ko]undefined!

[David Rientjes]

On Tue, 26 Feb 2008, Martin Michlmayr wrote:

> With 2.6.25-rc3 and a config file with
> 
> CONFIG_CRYPTO_DEV_HIFN_795X=m
> CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y
> 
> I get the following build error on at least ARM and MIPS:
> 
>   Building modules, stage 2.
>   MODPOST 759 modules
> ERROR: "__divdi3" [drivers/crypto/hifn_795x.ko] undefined!
> 

crypto: use do_div() when registering the rng

Use do_div() instead of the divide operator.

Cc: Patrick McHardy <kaber@xxxxxxxxx>
Cc: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
Signed-off-by: David Rientjes <rientjes@xxxxxxxxxx>
---
 Looks like this was triggered by f881d829, which causes this code to be
 compiled for CONFIG_CRYPTO_DEV_HIFN_795X_RNG.

 drivers/crypto/hifn_795x.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -822,12 +822,14 @@ static int hifn_rng_data_read(struct hwrng *rng, u32 *data)
 
 static int hifn_register_rng(struct hifn_device *dev)
 {
+	unsigned int tmp;
+
 	/*
 	 * We must wait at least 256 Pk_clk cycles between two reads of the rng.
 	 */
-	dev->rng_wait_time	= DIV_ROUND_UP(NSEC_PER_SEC, dev->pk_clk_freq) *
-				  256;
-
+	tmp = NSEC_PER_SEC + dev->pk_clk_freq - 1;
+	do_div(tmp, dev->pk_clk_freq);
+	dev->rng_wait_time	= tmp * 256;
 	dev->rng.name		= dev->name;
 	dev->rng.data_present	= hifn_rng_data_present,
 	dev->rng.data_read	= hifn_rng_data_read,
--
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