Re: Mapping PCI BAR through /sys/devices/pci* sets cache-disableandwrite-through

[Jesse Barnes]

On Thursday, April 17, 2008 6:14 am Pallipadi, Venkatesh wrote:
> >Jesse Barnes suggested using the fact that the BAR was prefetchable to
> >guess that this region should not be mapped UC. I don't know of any
> >other information available at this API that would help make a better
> >choice; there are no ioctls on /sys files that we could use to
> >manipulate the mapping.
>
> Yes. But, the API being there for some time may mean that there is some
> user who always wants UC behavior with or without PREFETCHABLE flag.
> With PAT changes we thought of ioctl and then settled on new interface.

Yeah, we can't really know.  There *probably* aren't any users here that would 
break, but you never know, and it's best not to change the behavior of an 
existing API...

> >Yeah, we'll do that when it becomes available. Would it make sense in
> >the pre-PAT world to use Jesse's guess?
>
> Yes. Easiest way to do that will be to use UC_MINUS (Just set PCD bit
> and not PWT bit) until PAT changes.
> Ioremap() uses UC_MINUS, it should not have any side effects to other
> users who expect this mapping to be UC without any MTRR setting.

We could probably do that unconditionally though, rather than dependent on the 
prefetchable bit like my patch does.

> >In any case, we'll continue to use the fact that mprotect is
> >also broken
> >to get our WC mapping working (using mprotect PROT_NONE followed by
> >mprotect PROT_READ|PROT_WRITE causes the CD and WT bits to get
> >cleared).
> >We're fortunate in this case that we've found a bug to exploit that
> >gives us the desired behaviour.
>
> Noo.. Now we have one more thing in PAT to do list :-(. To go and plug
> those mprotect APIs to prevent users from doing things like this.

I think it's just a long standing bug...  mprotect really shouldn't be 
clobbering PTE bits regardless of PAT (though with PAT the bug becomes more 
serious).

Jesse
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