Re: NIU - Sun Neptune 10g - Transmit timed out reset (2.6.24)
From: Rick Jones
Date: Fri May 09 2008 - 19:33:58 EST
Jesper Krogh wrote:
Rick Jones wrote:
To which cpu(s) were the neptune's interrupts assigned? (grep <ethN>
/proc/interrupts)
Several
Which ones?-) I suspect that since it is several that at least
answers the MSI_X question right? Or is it possible to have a single
device have several MSI interrupts?
Well, the output below anwered my question about multiple MSI's from a
single device :)
The table is rather large.
http://rafb.net/p/a9zfFA59.html
So, over time at least, the interrupts have been spread over half the
cores in the system. This is where the block diagram showing the socket
and I/O slot connections would be useful.
For the interrupts over a given interval, one can take snapshots at
either end of the interval and then run them through beforeafter:
ftp://ftp.cup.hp.com/dist/networking/tools/
I think that collectl might have something there too.
I guess the addresses in use weren't sufficient to get interrupts spread
across all 24 IRQ's.
rick jones
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