[PATCH 1/5] x86: move pic_mode to apic_32.c

[Alexey Starikovskiy]

Signed-off-by: Alexey Starikovskiy <astarikovskiy@xxxxxxx>
---

 arch/x86/kernel/apic_32.c     |    2 ++
 arch/x86/kernel/mpparse.c     |    4 +---
 arch/x86/mach-visws/mpparse.c |    2 --
 3 files changed, 3 insertions(+), 5 deletions(-)


diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 6b2c2cf..c0dd696 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -77,6 +77,8 @@ char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE};
  */
 int apic_verbosity;
 
+int pic_mode;
+
 static unsigned int calibration_result;
 
 static int lapic_next_event(unsigned long delta,
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 59f051d..b72c046 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -48,8 +48,6 @@ int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
 
 static int mp_current_pci_id;
 
-int pic_mode;
-
 /*
  * Intel MP BIOS table parsing routines:
  */
@@ -609,7 +607,7 @@ static void __init __get_smp_config(unsigned early)
 
 	printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
 	       mpf->mpf_specification);
-#ifdef CONFIG_X86_32
+#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
 	if (mpf->mpf_feature2 & (1 << 7)) {
 		printk(KERN_INFO "    IMCR and PIC compatibility mode.\n");
 		pic_mode = 1;
diff --git a/arch/x86/mach-visws/mpparse.c b/arch/x86/mach-visws/mpparse.c
index 57484e9..b7d063e 100644
--- a/arch/x86/mach-visws/mpparse.c
+++ b/arch/x86/mach-visws/mpparse.c
@@ -11,8 +11,6 @@
 /* Have we found an MP table */
 int smp_found_config;
 
-int pic_mode;
-
 extern unsigned int __cpuinitdata maxcpus;
 
 /*

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