Re: [PATCH] x86: let 32bit use apic_ops too

[Maciej W. Rozycki]

On Mon, 14 Jul 2008, Cyrill Gorcunov wrote:

> Maciej, but if we eliminate LOCK# by using simple MOV there will not
> be guarantee for atomicity. Am I wrong?

 You are right, but we do not care about atomicity.  We only care about
interrupts.  This is because the local APIC is private to its associated
CPU and inaccessible from the outside, at least for writes (mind the
Remote Read command), so as long as the local CPU does not issue
consecutive write cycles, there is no problem with another CPU getting in
the way.  Which means any RMW instruction would suffice here, with the R
part of the cycle separating any possible preceding write from one
immediately following, but unfortunately the only one we can use is the
XCHG and it has always implied the LOCK#, since the 8086, which at that
point was considered a microoptimization (the LOCK# was cheap and an extra
memory byte, otherwise needed for the LOCK prefix, expensive back then).  
So atomicity is an unfortunate side effect rather than a part of the
design here.

 Now if we know the APIC does not suffer from the double-write erratum,
then we can use a straight MOV as consecutive writes are not a concern
anymore.

  Maciej
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