Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing

[FUJITA Tomonori]

On Fri, 19 Sep 2008 08:29:46 +0200
Joerg Roedel <joro@xxxxxxxxxx> wrote:

> > > diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> > > index c2e00ee..569527e 100644
> > > --- a/Documentation/kernel-parameters.txt
> > > +++ b/Documentation/kernel-parameters.txt
> > > @@ -888,6 +888,10 @@ and is between 256 and 4096 characters. It is defined in the file
> > >  		nomerge
> > >  		forcesac
> > >  		soft
> > > +		fullflush
> > > +			Flush IO/TLB at every deallocation
> > > +		nofullflush
> > > +			Flush IO/TLB only when addresses are reused (default)
> > 
> > I'm not sure about making 'nofullflush' a generic option. Enabling
> > nofullflush option doesn't change anything. So what's the point of the
> > option?
> 
> Backwards compatability with the GART code. These two options are
> basically just moved from the GART code to pci-dma.c. But otherwise its
> pointless, I can remove it if everybody else agrees.

The compatibility with the GART code doesn't mean that we need to have
this pointless option as a common option. You can make 'fullflush' a
common option and the meaningless 'nofullflush' can live in GART.
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