RE: [PATCH] Typo in x86 apic.c with DIVISOR setup

[Pallipadi, Venkatesh]

>-----Original Message-----
>From: Cyrill Gorcunov [mailto:gorcunov@xxxxxxxxx]
>Sent: Thursday, October 09, 2008 10:39 PM
>To: Pallipadi, Venkatesh
>Cc: Ingo Molnar; Thomas Gleixner; H. Peter Anvin; linux-kernel
>Subject: Re: [PATCH] Typo in x86 apic.c with DIVISOR setup
>
>
>But here is not the same
>
>       apic_write(APIC_TDCR,
>               (tmp_value & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) |
>-               APIC_TDR_DIV_16);
>+               APIC_TDR_DIV);
>
>On x86_64 it will be 1 now but we've used 16 for a long time in purpose
>to slowdown processor's bus CLKs from APIC point of view. So I
>don't think
>it's good idea to change it now. If we start using divisor 1
>today -- it would
>work for some time 'till processor bus raised to the some speed when
>we'll get counter underflow before calibration finished.
>

I understand that using 1 instead of 16 makes APIC timer count 16 times faster.
I did that change as I thought that was the intention of making APIC_DIVISOR as 1.
Otherwise, there is no real impact of APIC_DIVISOR #define from being there. It
Is just changing the value of calibration_result across 32 bit and 64 bit kernels.

For example, "host bus clock speed" message will print different values across
32 bit and 64 bit kernels on the same system, if we just make APIC_DIVISOR
16 for 32 bit and 1 for 64 bit kernel.


Thanks,
Venki
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