Re: 2.6.29-rc libata sff 32bit PIO regression

[Jeff Garzik]

Alan Cox wrote:
> > [PATCH] libata sff: 32bit PIO use 16bit on slop
> >
> > 871af1210f13966ab911ed2166e4ab2ce775b99d libata: Add 32bit PIO support
> > causes errors on a four-year-old ata_piix Dell Precision 670.  Using
> > 16bit PIO instead of 32bit PIO on the odd 1, 2 or 3 chars fixes that.
> >
> > Signed-off-by: Hugh Dickins <hugh@xxxxxxxxxxx>
>
> For the 3 bytes of slop it should use a single iowrite32 but otherwise
> that seems ok. We do need to handle the FIFO setup on the AMD differently
> if we do this - something like this:
>
> pata_amd: Program FIFO
>
> From: Alan Cox <alan@xxxxxxxxxxxxxxxxxxx>
>
> With 32bit PIO we can use the posted write buffers, but only for 32bit I/O
> cycles. This means we must disable the FIFO for ATAPI where a final 16bit
> cycle may occur.
>
> Rework the FIFO logic so that we disable the FIFO then selectively re-enable
> it when we set the timings on AMD devices. Also fix a case where we scribbled
> on PCI config 0x41 of Nvidia chips when we shouldn't.
>
> Signed-off-by: Alan Cox <alan@xxxxxxxxxxxxxxxxxxx>
> ---
>
>  drivers/ata/pata_amd.c |   78 +++++++++++++++++++++++++++++++++++++-----------
>  1 files changed, 60 insertions(+), 18 deletions(-)

tested and ok for -rc?


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