On Thu, Apr 30, 2009 at 08:35:08AM -0700, Matthew Wilcox wrote:On Thu, Apr 30, 2009 at 02:47:02PM +0100, Alan Cox wrote:I think Matthew Garrett already has code to do this.So, at the point of driver load, there just isn't much we can do aboutForcing out of PIIX mode would need to go into the PCI quirks and be a
the missing ABAR. It's sad. Dunno why some laptop manufacturers
still program the thing into piix mode. :-(
boot option not a module one - at that point its doable as a header quirk.
Yeah, but some testers reported that it broke after using it for a while. The most recent version I have is this:
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index a807797..9e7b460 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -893,6 +893,52 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
+static void __devinit quirk_ahci_sata(struct pci_dev *pdev)
+{
+ u32 sir, newval;
+ u16 mode;
+
+ /* Make sure we're in AHCI mode */
+ pci_read_config_word(pdev, 0x90, &mode);
+ pci_write_config_word(pdev, 0x90, 0x40);
+
+ /* Need to set the SCRAE bit */
+ pci_read_config_dword(pdev, 0x94, &sir);
+ newval = (sir | 0x200);
+ pci_write_config_dword(pdev, 0x94, newval);
+
+ /* Set PCI_CLASS_STORAGE_SATA */
+ if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
+ pci_write_config_byte(pdev, PCI_CLASS_PROG, 0x01);
+ pci_write_config_byte(pdev, PCI_CLASS_DEVICE, 0x06);
+ pdev->class = PCI_CLASS_STORAGE_SATA_AHCI;
+ }
+
+ pci_read_config_word(pdev, PCI_DEVICE_ID, &pdev->device);
+ pci_assign_resource(pdev, 5);
+
+ printk (KERN_INFO "Quirked PIIX device to AHCI mode\n");
+}
+
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2652, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2653, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2680, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x27c4, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2828, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2928, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x292d, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x292e, quirk_ahci_sata);
+
+#if 0
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2651, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x27c0, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2820, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2825, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2920, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2921, quirk_ahci_sata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2926, quirk_ahci_sata);
+#endif
+
/*
* Serverworks CSB5 IDE does not fully support native mode
*/